This week, Amelia Dalton’s Fish Fry covers (among other things) the recent Intel/Xilinx investment in Oasys.
Monthly Archives: April 2012
Power is Everyone’s Business
Paul’s opinion piece in EEtimes, Power is Everyone’s Business, has been published. Of course power is the most acute issue on both high performance and mobile designs, and looking out further it is only going to get more extreme if we are going to avoid “dark silicon,” being able to put more on a chip than we can power up.
With traditional synthesis tools, there is no good way to partition the power budget among the large number of blocks on a chip that traditional methodologies create in an advanced process node such as 45- or 28-nanometer or less. Even if a reasonable division of the power budget among the various parts of the design is found, iterating the design to analyze different “what-if” scenarios is too cumbersome.
Shishpal Rawat, Director, Business Enabling Programs, Design Technology Solutions Group
Oasys’ technology has the potential to positively impact the design flow for VLSI chip implementation. This is a new way of thinking for next-generation chip design implementation.
Oasys Gets Funded by Intel and Xilinx
Oasys announced today that it closed its series B funding round with investments from Intel Capital and Xilinx. The fact that any EDA company has closed a funding round is newsworthy these days; companies running out of cash and closing the doors seems to be a more common story.
Oasys has been relatively quiet, which some people have taken to mean that nobody is using RealTime Designer, their synthesis tool. But in fact they have announced that #2-4 US semiconductor companies, namely Texas Instruments, Qualcomm and Broadcom (OK, they didn’t announce Broadcom, they announced Netlogic and then Broadcom acquired them) are customers. As is Xilinx, the #1 FPGA vendor, or vendor of programmable platforms as they seem to want to be known. Now with Intel, Oasys have filled out the enviable position of having relationships with the top 4 US semiconductor vendors and the top FPGA vendor. These are the companies doing many of the most advanced designs today.
The press release is here.
Oasys Design Systems Closes Series B Funding With Investments From Intel Capital, Xilinx
Capital to be Used to Expand R&D, Support
SANTA CLARA, CALIF. –– April 10, 2012 — Oasys Design Systems, a provider of chip design software, today announced it has closed Series B Funding with investments from Intel Capital, Intel’s global investment organization, and Xilinx, a leading provider of programmable platforms. Funding will be used as working capital to expand Oasys’ research and development team, as well as for further expansion of its worldwide support structure.
Chip Synthesis™ is a fundamental shift in how synthesis is applied to the design and implementation of integrated circuits (ICs). Traditional block-level synthesis tools do a poor job of handling chip-level issues. Oasys’ RealTime Designer™ is the first design tool for physical register transfer level (RTL) synthesis of 100-million gate designs and produces better results in a fraction of the time needed by traditional logic synthesis products. It features a unique RTL placement approach that eliminates unending design closure iterations between synthesis and layout.
“Xilinx has licensed Oasys technology and achieved excellent results across a wide range of designs,” says Salil Raje, vice president of Software and IP Product Development at Xilinx. “We have a long-standing and productive working relationship with the Oasys team and we are pleased to extend our support through this investment.”
“Oasys’ technology has the potential to positively impact the design flow for VLSI chip implementation,” adds Shishpal Rawat, director, Business Enabling Programs at Design Technology Solutions Group, Intel. “This is a new way of thinking for next-generation chip design implementation. We are pleased to invest in Oasys.”
“We are excited to have the venture capital arm of the number one semiconductor company and the number one programmable platforms vendor as investors in Oasys,” remarks Paul van Besouw, Oasys’ president and chief executive officer. “With tapeouts at 45- and 28-nanometer process nodes, Realtime Designer is the proven synthesis solution offering substantial runtime and capacity advantages for some of the world’s most complex designs. Intel Capital and Xilinx have given us strategic support, and their investment will enable us to scale commercially and to continue to advance our technology.”
Previously, Oasys announced that several top U.S. semiconductor companies, such as Texas Instruments, Qualcomm and Xilinx, are already using RealTime Designer. In 2011, Oasys enhanced its Chip Synthesis platform by adding design for test (DFT) capabilities and support for chip-level power design, further extending the fast speed and high capacity of RealTime Designer. These additional features completed the fully integrated Chip Synthesis design flow.